Such integrations are facilitated by various methodologies such as wafer level fan out (WLFO), embedded multi-die interconnect bridge (EMIB), and interposers amongst others. Interposers for systems in package will become more important for advanced electronic systems, especially for 2.5D and 3D IC applications, due to the proven benefits of silicon interposers with through silicon vias (TSV). Since Mega Trends such as the Internet of Things (IoT) and connected and self-driving cars will necessitate higher bandwidth data processing and communications, the need for high-performance electronic systems will increase further. This will, in turn, drive the interposers market as chip scaling has reached economical limits, and advancements in packaging have been the key focus for advancing electronics on a chip-scale. But the growth of interposer technology is also dependent on addressing challenges, performance, and cost barriers induced by the interposer materials.
The interposers used for packaging applications are of kinds: silicon, organic and glass. Each interposer has unique advantages and limitations, and several research activities are ongoing to mitigate the addressable challenges in the electrical, mechanical, and thermal properties of the materials to realize high-performance electronic devices.
Following are overviews of each interposer, along with their applications and future trends.
Silicon interposers played a key role in integrating the 2.5 and 3D IC chips due to their higher fine pitch i/o density and TSV formation capability. The silicon interposer is a proven technology and has been commercially used in several high-performance computing systems where the logic and memory device heterogeneous integrations are established within the same interposer platform. However, the technology faces performance limitations which can be attributed to TSV profile and microfluidic thermal design changes made to mitigate thermal issues. Cost will be one of the key challenging factors for continued adoption of silicon interposers in the market. With the current silicon interposers, the cost to support these high-performance systems would be very high. Silicon interposers add close to $30 for a medium-sized chip, but the cost can reach beyond $100 to connect multiple reticles for a larger chip. This has limited silicon interposers to applications in high-speed networking and server chips where cost is not an issue. The cost of silicon interposers will increase drastically to accommodate future electronic devices. Hence, significant research efforts are underway to lower cost and explore opportunities in other materials such as glass interposers.
The benefit of glass interposers is double fold. They promise higher interconnect density than organic interposers, but also at a significantly lower cost when compared to a silicon interposer with similar interconnect density.
Therefore, glass interposers are expected to be adopted in ultra-high i/o pitch density applications such as in communications, network and signal processing and testing, high bandwidth memory (HBM), high-performance computing such as in opto-electronics based computing, and radio frequency (RF). Additionally, glass interposers also find adoption in low-cost packaging applications such as micro-electro mechanical systems (MEMS), sensor, power, and analog devices among others.
Glass interposers’ availability at lower cost is not only due to cheaper material cost, but also due to its cost-effectiveness when available in panel form. Glass panel interposers have a good opportunity to demonstrate high yield.
However, glass interposers face challenges during manufacturing, such as surface defects that leads to cracking, relatively lower thermal conductivity compared to silicon interposers, and limitations in effective diameter achievability for through glass vias (TGV). Hence, it is expected that research efforts will continue in areas such as panel-based approaches for cost, etching techniques for improvements in TGV, utilization of polymers and metallization for realizing high-performance applications, redistribution layer (RDL) techniques to provide lateral interconnections, and so forth to fabricate a commercially viable glass interposer that can realize the most needed cost benefits in the industry.
The organic interposer, like the glass interposer, is one of the alternate types of interposers being explored to realize the cost benefits from interposer technology. Organic interposers prove to be cheaper due to a well-established supply chain and the ability to be manufactured using traditional processes such as wet etching. The challenge with organic interposers is in their mechanical properties due to their flexibility. They also have a lower finer pitch i/o density than silicon and glass interposers. Currently, organic interposers are suited for logic-memory integration, large central processing units (CPUs) / graphics processing units (GPUs), and certain types of application specific integrated chips (ASICs). Interestingly, certain high-performance RF applications have been demonstrated using organic interposers. However, their applicability to next-generation high-performance application is still being researched.
In summary, each interposer has its own benefits and barriers, and the interposer will definitely be a subject of high research interest in the semiconductor community due to the heterogeneous integrations it enables. Currently, silicon and organic interposers have commercial applications in several high-performance applications such as CPU, GPU, etc. However, as silicon interposers reach a point of inflection, the industry will face cost challenges, which in turn will lead to demand for the as yet uncommercialized glass interposers.